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TSM103/A
DUAL OPERATIONAL AMPLIFIER AND VOLTAGE REFERENCE
NOT FOR NEW DESIGN - REPLACED BY TSM103W
OPERATIONAL AMPLIFIER
s LOW INPUT OFFSET VOLTAGE : 0.5mV
typ.for TSM103A
s LOW SUPPLY CURRENT : 350A/op. s MEDIUM BANDWIDTH (unity gain) : 0.9MHz s LARGE OUTPUT VOLTAGE SWING : 0V to s INPUT COMMON MODE VOLTAGE RANGE
INCLUDES GROUND (VCC - 1.5V)
D SO8 (Plastic Micropackage)
(@ V CC = 5V)
s WIDE POWER SUPPLY RANGE : 3 to 32V
1.5 TO 16V VOLTAGE REFERENCE
s FIXED OUTPUT VOLTAGE REFERENCE 2.5V s 0.4% AND 1% VOLTAGE PRECISION s SINK CURRENT CAPABILITY : 1 to 100mA s TYPICAL OUTPUT IMPEDANCE : 0.2
DESCRIPTION The TSM103 is a monolithic IC that includes one independent op-amp and another op-amp for which the non inverting input is wired to a 2.5V fixed Voltage Reference. This device is offering space and cost saving in many applications like power supply management or data acquisition systems. ORDER CODE
Package Part Number TSM103I/AI Temperature Range D -40C, +105C *
PIN CONNECTIONS (top view)
Output 1
1
OP1
Inverting Input 1 2 Non-inverting Input 1 3 V -4 CC
+
OP2
8 VCC+ 7 Output 2 6 Inverting Input 2
VRef
+
-
5 Non-inverting Input 2
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
January 2003
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ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vid Vi Toper Tj Rthja Supply Voltage Differential Input Voltage Input Voltage Operating Free-air Temperature Range Maximum Junction Temperature Thermal Resistance Junction to Ambient (SO package) Parameter Value 36 36 -03. to +36 -55 to +125 150 175 Unit V V V C C C/W
ELECTRICAL CHARACTERISTICS
Symbol Parameter Total Supply Current, excluding Current in the Voltage Reference VCC+ = 5V, no load Tmin. < Tamb < Tmax. VCC+ = 30V, no load Tmin. < Tamb < Tmax Min. Typ. Max. Unit
ICC
1.2 0.7 2
mA
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OPERATOR 2 (independent op-amp) VCC+ = +5V, VCC = Ground, V o = 1.4V,T amb = 25C (unless otherwise specified)
Symbol Vio Parameter Input Offset Voltage TSM103, Tamb = 25C Tmin. Tamb Tmax. TSM103A, Tamb = 25C Tmin. Tamb Tmax. Input Offset Voltage Drift Input Offset Current Tmin. Tamb Tmax. Input Bias Current Tmin. Tamb Tmax Large Signal Voltage Gain VCC = 15V, RL = 2k, Vo = 1.4V to 11.4V Tmin. Tamb Tmax. Supply Voltage Rejection Ratio VCC = 5V to 30V Input Common Mode Voltage Range VCC = +30V - see note 1) Tmin. Tamb Tmax. Common Mode Rejection Ratio Tmin. Tamb Tmax. Output Current Source VCC = +15V, Vo = 2V, Vid = +1V Short Circuit to Ground VCC = +15V Output Current Sink Vid = -1V, VCC = +15V, Vo = 2V High Level Output Voltage VCC+ = 30V Tamb = 25C, RL = 10k Tmin. Tamb Tmax. Low Level Output Voltage RL = 10k Tmin. Tamb Tmax. SR Slew Rate at Unity Gain Vi = 0.5 to 3V, VCC = 15V RL = 2k, CL = 100pF, unity gain Gain Bandwidth Product VCC = 30V,RL = 2k, CL = 100pF f = 100kHz, Vin = 10mV Total Harmonic Distortion f = 1kHz AV = 20dB,RL = 2k, VCC = 30V CL = 100pF, Vo = 2Vpp 0.2 5 20 20 V/s 0.4 MHz 0.5 0.9 % 0.02 50 25 65 0 0 70 60 20 85 Min. Typ. 1 0.5 7 2 20 30 50 150 200 Max. 4 5 2 3 V/C nA nA V/mV 100 dB 100 (VCC+) -1.5 V Unit mV
DVio Iio Iib Avd
SVR Vicm
(VCC+) -2
dB mA 40 mA 40 60 mA
CMR Isource Io Isink
10
20 V
VOH
27 27
28 mV
VOL
GBP
THD
1. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is VCC+ - 1.5V. But either of both inputs can go to +36V without damage.
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OPERATOR 1 (op-amp with non-inverting input connected to the internal Vref) VCC+ = +5V, VCC- = Ground, Tamb = 25C (unless otherwise specified)
Symbol Vio Parameter Input Offset Voltage Vicm = 0V TSM103, Tamb = 25C Tmin. Tamb Tmax. TSM103A, Tamb = 25C Tmin. Tamb Tmax. Input Offset Voltage Drift Input Bias Current negative input Large Signal Voltage Gain Vicm = 0V VCC = 15V, RL = 2k Supply Voltage Rejection Ratio Vicm = 0V VCC+ = 5V to 30V Output Current Source Vo = 2V VCC = +15V, Vid = +1V Short Circuit to Ground VCC = +15V Output Current Sink Vid = -1V, VCC = +15V, Vo = 2V High Level Output Voltage VCC+ = 30V Tamb = 25C, RL = 10k Tmin. Tamb Tmax. Low Level Output Voltage RL = 10k Tmin. Tamb Tmax. SR Slew Rate at Unity Gain Vi = 0.5 to 2V, VCC = 15V RL = 2k, CL = 100pF, unity gain Gain Bandwidth Product VCC = 30V,RL = 2k, CL = 100pF f = 100kHz, Vin = 10mV Total Harmonic Distortion f = 1kHz AV = 20dB,RL = 2k, VCC = 30V CL = 100pF, Vo = 2Vpp 0.2 5 20 20 V/s 0.4 MHz 0.5 0.9 % 0.02 Min. Typ. Max. Unit mV 1 0.5 4 5 2 3 V/C nA 20 V/mV 100 dB 65 100 mA 20 40 mA 40 60 mA 10 20 V 27 27
DVio Iib Avd
7
SVR
Isource
Io Isink
VOH
28 mV
VOL
GBP
THD
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TSM103/A
VOLTAGE REFERENCE
Symbol Ik Symbol Vref Cathode Current Parameter Reference Input Voltage TSM103, Tamb = 25C Tmin. Tamb Tmax. TSM103A, Tamb = 25C Tmin. Tamb Tmax. Reference Input Voltage Deviation Over Temperature Range VKA = Vref; Ik = 10mA Tmin. Tamb Tmax. Minimum Cathode Current for Regulation VKA = Vref Dynamic Impedance - note 1) VKA = Vref, IK = 1 to 100mA, f < 1kHz Min. 2.475 2.45 2.49 2.48 Typ. 2.5 2.5 Parameter Value 1 to 100 Max. 2.525 2.55 2.51 2.52 mV Unit mA Unit V
Vref
7 0.5 0.2
30 mA 1 0.5
Imin |ZKA|
1. The dynamic impedance is defined as [Z KA| = VKA/IK
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OPERATIONAL AMPLIFIERS
Unit Frequency = F(I)
Vcc=+/-15V, RL=2k, CL=100pF
1000 800
Unit Freq
Thousands
600 400 200 0 -0.01 -0.005 0 0.005 0.01 0.015
source <=
I (A)
=> sink
GBP = F(I)
Vcc=+/-15V, RL=2k, CL=100pF
800 700 600 Thousands
GBP
500 400 300 200 100 0 -0.01 -0.005 0 0.005 0.01 0.015
source <=
I (A)
=> sink
Phase and Gain Margin = F(I)
Vcc=+/-15V, RL=2k, CL=100pF
60 50 0 -2 Gain Margin (dB) -4 -6 30 -8 20 10 0 -0.01 -0.005 0 0.005 0.01 -10 -12 -14 0.015
Phase Margin (deg)
40
source <=
I (A)
=> sink
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Total Harmonic Distorsion THD = F(freq)
0.014 0.013 0.012 0.011
THD(%)
0.01 0.009 0.008 0.007 0.006 0.005 10 100 1000 10000
Frequency (Hz)
Noise = F(frequency)
70 60
Noise(nV/SQR(Hz))
50 40 30 20 10 0 0.01
0.1
1
10
100
Frequency (Hz)
Vio Distribution - Operator 1
Vcc+=5V, Vcc-=0V
70 60
Distribution (%)
50 40 30 20 10 0 -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 3
Vio (mV)
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TSM103/A
Vio Distribution - Operator 2
Vcc+=5V, Vcc-=0V
70 60
Distribution (%)
50 40 30 20 10 0 -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 3
Vio (mV)
Vref = F(Ik)
3 2.5
Vref (V)
2 1.5 1 0.5 0.0002
0.002
0.02
0.2
Cathode Current Ik (Amps)
Vref Stability = f(I,C)
0.06 0.05
Stable
Current (Amps)
0.04 0.03 0.02 0.01 0 1E-10
Unstable
1E-9
1E-8
1E-7
1E-6
1E-5
Capacitor(F)
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TSM103/A
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO)
Millimeters Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.150 0.016 Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.189 0.228 Min. 0.004 0.026 0.014 0.007 0.010
Inches Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com
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